日志
vga
||
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Module Name: vga_test
//
//////////////////////////////////////////////////////////////////////////////////
module vga_test(
input fpga_gclk,
output vga_hs,
output vga_vs,
output [4:0] vga_r,
output [5:0] vga_g,
output [4:0] vga_b //按键 key1
);
//-----------------------------------------------------------//
// 水平扫描参数的设定 1024*768 60Hz VGA
//-----------------------------------------------------------//
parameter LinePeriod =1344; //行周期数
parameter H_SyncPulse=136; //行同步脉冲（Sync a）
parameter H_BackPorch=160; //显示后沿（Back porch b）
parameter H_ActivePix=1024; //显示时序段（Display interval c）
parameter H_FrontPorch=24; //显示前沿（Front porch d）
parameter Hde_start=296;
parameter Hde_end=1320;
// 垂直扫描参数的设定 1024*768 60Hz VGA
//-----------------------------------------------------------//
parameter FramePeriod =806; //列周期数
parameter V_SyncPulse=6; //列同步脉冲（Sync o）
parameter V_BackPorch=29; //显示后沿（Back porch p）
parameter V_ActivePix=768; //显示时序段（Display interval q）
parameter V_FrontPorch=3; //显示前沿（Front porch r）
parameter Vde_start=35;
parameter Vde_end=803;
reg[10 : 0] x_cnt=0;
reg[9 : 0] y_cnt=0;
reg[15 : 0] grid_data_1;
reg[15 : 0] grid_data_2;
reg[15 : 0] bar_data;
reg[3 : 0] vga_dis_mode;
reg[4 : 0] vga_r_reg;
reg[5 : 0] vga_g_reg;
reg[4 : 0] vga_b_reg;
reg hsync_r;
reg vsync_r;
reg hsync_de;
reg vsync_de;
reg [15:0] key1_counter; //按键检测寄存器
wire vga_clk;
wire CLK_OUT1;
wire CLK_OUT2;
wire CLK_OUT3;
wire CLK_OUT4;
wire [12:0] bar_interval;
assign bar_interval = H_ActivePix[15: 3]; //彩条宽度=H_ActivePix/8
//----------------------------------------------------------------////////// 水平扫描计数
//----------------------------------------------------------------
always @ (posedge vga_clk)
if(1'b0) x_cnt <= 1;
else if(x_cnt == LinePeriod) x_cnt <= 1;
else x_cnt <= x_cnt+ 1;
always @ (posedge vga_clk)
begin
if(1'b0) hsync_r <= 1'b1;
else if(x_cnt == 1) hsync_r <= 1'b0; //产生 hsync 信号
else if(x_cnt == H_SyncPulse) hsync_r <= 1'b1;
if(1'b0) hsync_de <= 1'b0;
else if(x_cnt == Hde_start) hsync_de <= 1'b1; //产生 hsync_de 信号
else if(x_cnt == Hde_end) hsync_de <= 1'b0;
end
//----------------------------------------------------------------////////// 垂直扫描计数
//----------------------------------------------------------------
always @ (posedge vga_clk)
if(1'b0) y_cnt <= 1;
else if(y_cnt == FramePeriod) y_cnt <= 1;
else if(x_cnt == LinePeriod) y_cnt <= y_cnt+1;
//----------------------------------------------------------------////////// 垂直扫描信号 vsync, vsync_de 产生
//----------------------------------------------------------------
always @ (posedge vga_clk)
begin
if(1'b0) vsync_r <= 1'b1;
else if(y_cnt == 1) vsync_r <= 1'b0; //产生 vsync 信号
else if(y_cnt == V_SyncPulse) vsync_r <= 1'b1;
if(1'b0) vsync_de <= 1'b0;
else if(y_cnt == Vde_start) vsync_de <= 1'b1; //产生 vsync_de 信号
else if(y_cnt == Vde_end) vsync_de <= 1'b0;
end
//----------------------------------------------------------------////////// 格子测试图像产生
//----------------------------------------------------------------
always @(negedge vga_clk)
begin
if ((x_cnt[4]==1'b1) ^ (y_cnt[4]==1'b1)) //产生格子 1 图像
grid_data_1<= 16'h0000;
else
grid_data_1<= 16'hffff;
if ((x_cnt[6]==1'b1) ^ (y_cnt[6]==1'b1)) //产生格子 2 图像
grid_data_2<=16'h0000;
else
grid_data_2<=16'hffff;
end
//----------------------------------------------------------------////////// 彩色条测试图像产生
//----------------------------------------------------------------
always @(negedge vga_clk)
begin
if (x_cnt==Hde_start)
bar_data<= 16'hf800; //红色彩条
else if (x_cnt==Hde_start + bar_interval)
bar_data<= 16'h07e0; //绿色彩条
else if (x_cnt==Hde_start + bar_interval*2)
bar_data<=16'h001f; //蓝色彩条
else if (x_cnt==Hde_start + bar_interval*3)
bar_data<=16'hf81f; //紫色彩条
else if (x_cnt==Hde_start + bar_interval*4)
bar_data<=16'hffe0; //黄色彩条
else if (x_cnt==Hde_start + bar_interval*5)
bar_data<=16'h07ff; //青色彩条
else if (x_cnt==Hde_start + bar_interval*6)
bar_data<=16'hffff; //白色彩条
else if (x_cnt==Hde_start + bar_interval*7)
bar_data<=16'hfc00; //橙色彩条
else if (x_cnt==Hde_start + bar_interval*8)
bar_data<=16'h0000; //其余黑色
end
//----------------------------------------------------------------////////// VGA 图像选择输出
//----------------------------------------------------------------//LCD 数据信号选择
always @(negedge vga_clk)
if(1'b0) begin
vga_r_reg<=0;
vga_g_reg<=0;
vga_b_reg<=0;
end
else
case(vga_dis_mode)
4'b0000:begin
vga_r_reg<=0; //VGA 显示全黑
vga_g_reg<=0;
vga_b_reg<=0;
end
4'b0001:begin
vga_r_reg<=5'b11111; //VGA 显示全白
vga_g_reg<=6'b111111;
vga_b_reg<=5'b11111;
end
4'b0010:begin
vga_r_reg<=5'b11111; //VGA 显示全红
vga_g_reg<=0;
vga_b_reg<=0;
end
4'b0011:begin
vga_r_reg<=0; //VGA 显示全绿
vga_g_reg<=6'b111111;
vga_b_reg<=0;
end
4'b0100:begin
vga_r_reg<=0; //VGA 显示全蓝
vga_g_reg<=0;
vga_b_reg<=5'b11111;
end
4'b0101:begin
vga_r_reg<=grid_data_1[15:11]; // VGA 显示方格 1
vga_g_reg<=grid_data_1[10:5];
vga_b_reg<=grid_data_1[4:0];
end
4'b0110:begin
vga_r_reg<=grid_data_2[15:11]; // VGA 显示方格 2
vga_g_reg<=grid_data_2[10:5];
vga_b_reg<=grid_data_2[4:0];
end
4'b0111:begin
vga_r_reg<=x_cnt[6:2]; //VGA 显示水平渐变色
vga_g_reg<=x_cnt[6:1];
vga_b_reg<=x_cnt[6:2];
end
4'b1000:begin
vga_r_reg<=y_cnt[6:2]; //VGA 显示垂直渐变色
vga_g_reg<=y_cnt[6:1];
vga_b_reg<=y_cnt[6:2];
end
4'b1001:begin
vga_r_reg<=x_cnt[6:2]; //VGA 显示红水平渐变色
vga_g_reg<=0;
vga_b_reg<=0;
end
4'b1010:begin
vga_r_reg<=0; //VGA 显示绿水平渐变色
vga_g_reg<=x_cnt[6:1];
vga_b_reg<=0;
end
4'b1011:begin
vga_r_reg<=0; //VGA 显示蓝水平渐变色
vga_g_reg<=0;
vga_b_reg<=x_cnt[6:2];
end
4'b1100:begin
vga_r_reg<=bar_data[15:11]; //VGA 显示彩色条
vga_g_reg<=bar_data[10:5];
vga_b_reg<=bar_data[4:0];
end
default:begin
vga_r_reg<=5'b11111; //VGA 显示全白
vga_g_reg<=6'b111111;
vga_b_reg<=5'b11111;
end
endcase;
assign vga_hs = hsync_r;
assign vga_vs = vsync_r;
assign vga_r = (hsync_de & vsync_de)?vga_r_reg:5'b00000;
assign vga_g = (hsync_de & vsync_de)?vga_g_reg:6'b000000;
assign vga_b = (hsync_de & vsync_de)?vga_b_reg:5'b00000;
assign vga_clk = CLK_OUT1; //VGA 时钟频率选择 65Mhz
clk_60m uut_vga
(// Clock in ports
.CLK_IN1(fpga_gclk), // IN
.CLK_OUT1(CLK_OUT1), // 21.175Mhz for 640x480(60hz)
.RESET(0), // reset input
.LOCKED(LOCKED)); // OUT
// INST_TAG_END ------ End INSTANTIATI
//按钮处理程序
reg[25:0] i=0;
reg[3:0] b=0;
always @(posedge vga_clk)
begin
//if (key1==1'b0) // 如果按钮没有按下，寄存器为 0
//key1_counter<=0;
//else if ((key1==1'b1)& (key1_counter<=16'hc350)) //如果按钮按下并按下时间少于1ms,计数
//key1_counter<=key1_counter+1'b1;
//if (key1_counter==16'hc349) // 一次按钮有效，改变显示模式
//begin
//if(vga_dis_mode==4'b1101)
//vga_dis_mode<=4'b0010;
//else
//vga_dis_mode<=vga_dis_mode+1'b1;
//end
//end
if(i==26'd65000000)
begin
b<=b+1'd1;
vga_dis_mode<=b;//
i<=0;
end
else
i<=i+1'b1;
end
endmodule
#
#
#NET "vga_vs" IOSTANDARD = LVCMOS33;
#NET "vga_hs" IOSTANDARD = LVCMOS33;
#NET "rst" IOSTANDARD = LVCMOS33;
#NET "clk" IOSTANDARD = LVCMOS33;
#NET "vga_r0[4]" IOSTANDARD = LVCMOS33;
#NET "vga_r0[3]" IOSTANDARD = LVCMOS33;
#NET "vga_r0[2]" IOSTANDARD = LVCMOS33;
#NET "vga_r0[1]" IOSTANDARD = LVCMOS33;
#NET "vga_r0[0]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[5]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[4]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[3]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[2]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[1]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[0]" IOSTANDARD = LVCMOS33;
#NET "vga_b0[4]" IOSTANDARD = LVCMOS33;
#NET "vga_b0[3]" IOSTANDARD = LVCMOS33;
#NET "vga_b0[2]" IOSTANDARD = LVCMOS33;
#NET "vga_b0[1]" IOSTANDARD = LVCMOS33;
#NET "vga_b0[0]" IOSTANDARD = LVCMOS33;
#
#
#NET "clk" LOC = V10;
#NET "vga_r0[0]" LOC = C18;
#NET "vga_r0[1]" LOC = D18;
#NET "vga_r0[2]" LOC = E16;
#NET "vga_r0[3]" LOC = F17;
#NET "vga_r0[4]" LOC = F15;
#NET "vga_g0[0]" LOC = G18;
#NET "vga_g0[1]" LOC = G14;
#NET "vga_g0[2]" LOC = H18;
#NET "vga_g0[3]" LOC = H16;
#NET "vga_g0[4]" LOC = H14;
#NET "vga_g0[5]" LOC = H12;
#NET "vga_b0[0]" LOC = J16;
#NET "vga_b0[1]" LOC = K16;
#NET "vga_b0[2]" LOC = K17;
#NET "vga_b0[3]" LOC = K14;
#NET "vga_b0[4]" LOC = K12;
#NET "vga_hs" LOC = L17;
#NET "vga_vs" LOC = L15;
#NET "rst" LOC = N10;
#
#
#NET "m" LOC = C17;
#
## PlanAhead Generated IO constraints
#
#NET "m" IOSTANDARD = LVCMOS33;
NET "vga_vs" IOSTANDARD = LVCMOS33;
NET "vga_hs" IOSTANDARD = LVCMOS33;
NET "fpga_gclk" IOSTANDARD = LVCMOS33;
NET "vga_r[4]" IOSTANDARD = LVCMOS33;
NET "vga_r[3]" IOSTANDARD = LVCMOS33;
NET "vga_r[2]" IOSTANDARD = LVCMOS33;
NET "vga_r[1]" IOSTANDARD = LVCMOS33;
NET "vga_r[0]" IOSTANDARD = LVCMOS33;
NET "vga_g[5]" IOSTANDARD = LVCMOS33;
NET "vga_g[4]" IOSTANDARD = LVCMOS33;
NET "vga_g[3]" IOSTANDARD = LVCMOS33;
NET "vga_g[2]" IOSTANDARD = LVCMOS33;
NET "vga_g[1]" IOSTANDARD = LVCMOS33;
NET "vga_g[0]" IOSTANDARD = LVCMOS33;
NET "vga_b[4]" IOSTANDARD = LVCMOS33;
NET "vga_b[3]" IOSTANDARD = LVCMOS33;
NET "vga_b[2]" IOSTANDARD = LVCMOS33;
NET "vga_b[1]" IOSTANDARD = LVCMOS33;
NET "vga_b[0]" IOSTANDARD = LVCMOS33;
#NET "vga_g0[0]" LOC = G18;
#NET "vga_g0[1]" LOC = G14;
#NET "vga_g0[2]" LOC = H18;
#NET "vga_g0[3]" LOC = H16;
#NET "vga_g0[4]" LOC = H14;
#NET "vga_g0[5]" LOC = H12;
NET "fpga_gclk" LOC = V10;
NET "vga_r[0]" LOC = F15;
NET "vga_r[1]" LOC = F17;
NET "vga_r[2]" LOC = E16;
NET "vga_r[3]" LOC = D18;
NET "vga_r[4]" LOC = C18;
NET "vga_g[0]" LOC = H12;
NET "vga_g[1]" LOC = H14;
NET "vga_g[2]" LOC = H16;
NET "vga_g[3]" LOC = H18;
NET "vga_g[4]" LOC = G14;
NET "vga_g[5]" LOC = G18;
NET "vga_b[0]" LOC = K12;
NET "vga_b[1]" LOC = K14;
NET "vga_b[2]" LOC = K17;
NET "vga_b[3]" LOC = K16;
NET "vga_b[4]" LOC = J16;
NET "vga_hs" LOC = L17;
NET "vga_vs" LOC = L15;
